1. Field of the Invention
The present invention relates to an operational amplifier such as, for example, a fully-differential operational amplifier having differential input and output stages.
2. Description of the Related Art
Fully-differential operational amplifiers are used for amplification of small signals because they provide immunity to supply voltage variations and external noise.
U.S. Pat. No. 5,844,442 to Brehmer (Japanese Patent Application Publication No. H7-086850) discloses a fully-differential complementary metal oxide semiconductor (CMOS) operational amplifier section having an input stage with inverting and non-inverting input terminals for receiving a differential pair of input signals, and an output stage with inverting and non-inverting output terminals for output of a differential pair of output signals. The input stage includes a pair of input transistors with gate terminals that receive the input signals and a pair of transistors that supply current to the input transistors. The output stage includes two pairs of output transistors that are controlled by potentials supplied by the input transistors so as to output a differential pair of output signals. The polarity of the differential pair of output signals is reverse to the polarity of the differential pair of input signals. The output stage also includes four transistors that supply current to the two pairs of output transistors. The gate terminals of two of these four transistors and the gate terminal of one of the two transistors that supply current to the input transistors are interconnected by a common gate line. The amount of current fed to the input and output transistors is regulated by a bias potential applied to the common gate line.
A problem in the above configuration is that the common mode component of the differential pair of output signals may leak onto the common gate line via the parasitic gate-drain capacitance of the transistors that regulate the current fed to the output transistors. This leakage affects the differential output signals by feedback through the input transistors, causing phase error in the output.